In a CMOS image sensor that adopts a structure for sharing a plurality of pixels to realize microminiaturization of the pixels, there is a method of providing drain power supplies for a reset transistor and an amplification transistor of the CMOS image sensor as separate power supplies to reduce the driving load of the pixels.
In this method, the capacitive load of a vertical data line is small compared with capacitive load applied when the drain power supply for the reset transistor and the drain power supply for the amplification transistor are the same power supply. Therefore, high-speed operation can be performed.
On the other hand, in the structure for sharing a plurality of pixels in the past, a floating diffusion is divided and one reset transistor and one amplification transistor are shared for a plurality of pixels. When the drain power supply for the reset transistor and the drain power supply for the amplification transistor are separately power supplies, drain diffusion layers of reset transistors and drain diffusion layers of amplification transistors of cells have to be separately arranged to be laid out.
Therefore, it is difficult to symmetrically arrange a plurality of divided floating diffusions with respect to the reset transistor and the amplification transistor. Parasitic capacitances are different among the floating diffusions. As a result, step-like noise could occur among the pixels.